Senior Physical Design Engineer - P&R
<div class="col col-xs-7 description" id="job-description"><br/><strong>About Us:</strong><br/>Headquartered in Ottawa, BTA Design serves the electronic design community from Canada, specializing in ASIC and FPGA design and verification, and embedded software development services. We augment and enhance our clients’ teams and accelerate the development of complete designs.<br/><br/>We’re adaptable and efficient, with a brilliant staff at our core. We aim to be the best at what we do. <br/><br/>Our success continues to fuel growth. We are currently searching globally for a number of key technical resources, including a Senior Physical Designer with exceptional technical skills and significant experience in P&R.<br/><br/><strong>About the Position:</strong><br/>As a Digital Physical Design Engineer you will play a key role in backend implementation from netlist to GDSII on challenging blocks and sub-systems. Working remotely, you will use advanced flows and techniques in single-digit FinFET technology nodes. You will work within a strong and very experienced team and play an integral role in delivering world-class ASICs for our clients.<br/><br/><strong>Key Responsibilities:</strong><ul><li>Run P&R implementation flows and analyze the results</li><li>Create an adequate floorplan for physical aware synthesis</li><li>Bring the design to timing closure and run physical verification</li><li>Debug issues with tools, timing constraints, DFT and design</li><li>Work with design team to improve RTL and make it implementation friendly</li><li>Implement and apply timing ECOs</li><li>Run PrimeTime and analyze timing reports</li><li>Drive solutions to optimize power and area</li><li>Run IR-drop analysis and find optimal strategies to improve it</li><li>Interface analog and frontend teams.</li></ul><br/><strong>Key Qualifications:</strong><ul><li>8+ years of relevant experience in the ASIC digital P&R field.</li><li>Recent experience with leading EDA tools, advanced flows and techniques (Synopsys/Cadence)</li><li>Good understanding of advanced FinFET technology nodes, DRC rules and specific P&R requirements</li><li>Working experience with floor-planning</li><li>Good knowledge of CTS concepts and ability to design clocks based on timing requirements</li><li>Understanding of IR-drop optimization strategies</li><li>Experience with timing closure and ECO implementation (PT-ECO/Tweaker knowledge is an asset)</li><li>Strong scripting skills.</li><li>Experience or knowledge in some of the following: Synthesis, StarRC, PT DMSA, RedHawk, Calibre, Formal verification (LEC/Formality)</li><li>Track record as a self-starter and a team player</li></ul><br/><strong>Compensation:</strong><br/>$130,000 to $180,000 plus company bonus and benefits plan.<br/>Salary is heavily dependent on individual experience and capability.<br/><br/>This is a new position. Only candidates selected for an interview will be contacted. Artificial Intelligence tools are not used in the evaluation and selection of candidates.<br/><br/><strong>Why Work Here?</strong><br/>We offer interesting work in challenging, stimulating technical environments with companies that lead the world in technology and innovation.<br/><br/>We recognize that our strength is in the individuals who join our team, so at BTA Design Services, we foster an environment where everyone is appreciated, trusted and engaged. We recognize that work-life balance is important and we strive to provide our employees with challenging roles that also allow them to enjoy family, friends and life outside of work.<br/> </div>